- EP148
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- 發(fā)布者:凌曄科技
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查看此店鋪所有供求信息 聯(lián)系人:陳小姐 電話:13544017528 手機(jī):13544017528 地址:廣東省深圳市福田區(qū)中航路華強(qiáng)廣場C座13L 服務(wù): 價(jià)格: 綜合: 營業(yè)時(shí)間:全年?duì)I業(yè) QQ/微信/Skype: |
詳細(xì)信息
品牌:微驅(qū)
封裝:LQFP128
批號(hào):15+
數(shù)量:500
描述:Overview
EP148 is a 4-lane iDP (Internal Display Port) transmitter with 4-port 10-bit LVDS inputs. The chip receives video data from 2 or 4 LVDS ports and output the video data through a 2 or 4-lane iDP transmitter. Converting the video data from LVDS inputs to iDP outputs will greatly reduce the number of signal pairs required to carry the data. The chip can reduce number of signal pairs from 24 LVDS pairs to 4 iDP pairs. This will greatly reduce the cost of connectors and cables and is suitable for high frame rate and 3D flat panel applications.
Feature
•Compliant with VESA iDP Standard V1.0
•Programmable 2-port or 4-port LVDS inputs
•Support upto 165 Mhz pixel clock rate for each LVDS input port.
•Support 2 data maps for LVDS inputs
•Support DE-only timing
•Support flexible LVDS Port Swap feature for easy PCB layout
•Support both 8-bit and 10-bit color depth either in LVDS inputs or iDP outputs
•Programmable 2-lane or 4-lane iDP outputs
•Support 324 Mhz symbol clock rate for each lane of iDP outputs
•Support Dynamic iDP Lane Count Reduction and Expansion
•Programmable Control Registers through IIC interface
•Possible to work with default setting (4-port LVDS in and 4-lane iDP out) without the need for an MCU to program the control registers.
•Supports Power Down Mode
•128-pin LQFP (Pb-free)
深圳市凌曄科技有限公司
廣東省深圳市福田區(qū)華強(qiáng)廣場C座13L
TEL:0755-83660559
QQ:869030400
E-mail:869030400@qq.com
封裝:LQFP128
批號(hào):15+
數(shù)量:500
描述:Overview
EP148 is a 4-lane iDP (Internal Display Port) transmitter with 4-port 10-bit LVDS inputs. The chip receives video data from 2 or 4 LVDS ports and output the video data through a 2 or 4-lane iDP transmitter. Converting the video data from LVDS inputs to iDP outputs will greatly reduce the number of signal pairs required to carry the data. The chip can reduce number of signal pairs from 24 LVDS pairs to 4 iDP pairs. This will greatly reduce the cost of connectors and cables and is suitable for high frame rate and 3D flat panel applications.
Feature
•Compliant with VESA iDP Standard V1.0
•Programmable 2-port or 4-port LVDS inputs
•Support upto 165 Mhz pixel clock rate for each LVDS input port.
•Support 2 data maps for LVDS inputs
•Support DE-only timing
•Support flexible LVDS Port Swap feature for easy PCB layout
•Support both 8-bit and 10-bit color depth either in LVDS inputs or iDP outputs
•Programmable 2-lane or 4-lane iDP outputs
•Support 324 Mhz symbol clock rate for each lane of iDP outputs
•Support Dynamic iDP Lane Count Reduction and Expansion
•Programmable Control Registers through IIC interface
•Possible to work with default setting (4-port LVDS in and 4-lane iDP out) without the need for an MCU to program the control registers.
•Supports Power Down Mode
•128-pin LQFP (Pb-free)
深圳市凌曄科技有限公司
廣東省深圳市福田區(qū)華強(qiáng)廣場C座13L
TEL:0755-83660559
QQ:869030400
E-mail:869030400@qq.com
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